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	<title>Comments on: PCIe: Is your card silently struggling with TLP retransmits?</title>
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		<title>By: eli</title>
		<link>https://billauer.se/blog/2011/07/pcie-tlp-dllp-retransmit-data-link-layer-error/comment-page-1/#comment-773</link>
		<dc:creator>eli</dc:creator>
		<pubDate>Wed, 25 Apr 2012 06:47:41 +0000</pubDate>
		<guid isPermaLink="false">https://billauer.se/blog/?p=1453#comment-773</guid>
		<description>&lt;strong&gt;Questions &amp; Comments&lt;/strong&gt;

Since the comment section of similar posts tends to turn into a Q &amp; A session, I’ve taken that to a separate place. So if you’d like to discuss something with me, please post questions and comments &lt;a href=&quot;http://xillybus.com/forum/posting.php?mode=post&amp;f=2&quot; target=&quot;_blank&quot; rel=&quot;nofollow&quot;&gt;here&lt;/a&gt; instead. No registration is required.

&lt;strong&gt;This comment section is closed.&lt;/strong&gt;</description>
		<content:encoded><![CDATA[<p><strong>Questions &#038; Comments</strong></p>
<p>Since the comment section of similar posts tends to turn into a Q &#038; A session, I’ve taken that to a separate place. So if you’d like to discuss something with me, please post questions and comments <a href="http://xillybus.com/forum/posting.php?mode=post&#038;f=2" target="_blank" rel="nofollow">here</a> instead. No registration is required.</p>
<p><strong>This comment section is closed.</strong></p>
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		<title>By: eli</title>
		<link>https://billauer.se/blog/2011/07/pcie-tlp-dllp-retransmit-data-link-layer-error/comment-page-1/#comment-571</link>
		<dc:creator>eli</dc:creator>
		<pubDate>Mon, 01 Aug 2011 08:59:40 +0000</pubDate>
		<guid isPermaLink="false">https://billauer.se/blog/?p=1453#comment-571</guid>
		<description>The truth is I stopped to care as soon as I saw there are no errors whatsoever. I suppose you could either try to look for testing equipment (my guess: It won&#039;t be cheap) or try to develop a sniffer with an FPGA (which shouldn&#039;t be all that difficult).</description>
		<content:encoded><![CDATA[<p>The truth is I stopped to care as soon as I saw there are no errors whatsoever. I suppose you could either try to look for testing equipment (my guess: It won&#8217;t be cheap) or try to develop a sniffer with an FPGA (which shouldn&#8217;t be all that difficult).</p>
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		<title>By: Baruch</title>
		<link>https://billauer.se/blog/2011/07/pcie-tlp-dllp-retransmit-data-link-layer-error/comment-page-1/#comment-570</link>
		<dc:creator>Baruch</dc:creator>
		<pubDate>Mon, 01 Aug 2011 03:44:35 +0000</pubDate>
		<guid isPermaLink="false">https://billauer.se/blog/?p=1453#comment-570</guid>
		<description>Nice!

I have started to look at PCIe monitoring of my systems and am wondering if you have thoughts on higher level monitoring decisions that can be made? Any publicly available discussions of best practices?

This seems like an area that is under-utilized and under-discussed.</description>
		<content:encoded><![CDATA[<p>Nice!</p>
<p>I have started to look at PCIe monitoring of my systems and am wondering if you have thoughts on higher level monitoring decisions that can be made? Any publicly available discussions of best practices?</p>
<p>This seems like an area that is under-utilized and under-discussed.</p>
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