Comments on: i.MX51 EIM bus clarified https://billauer.se/blog/2011/10/imx51-imx-weim-freescale-arm-bus/ Anything I found worthy to write down. Thu, 26 Mar 2026 13:15:15 +0000 hourly 1 http://wordpress.org/?v=3.1.2 By: ARUN https://billauer.se/blog/2011/10/imx51-imx-weim-freescale-arm-bus/comment-page-1/#comment-1175 ARUN Wed, 30 Mar 2016 18:04:43 +0000 https://billauer.se/blog/?p=1989#comment-1175 Hi, I am using i.mx51 board. I am trying to get the 32bit mux data CS0. (MUM=1,DSZ=011) I am facing a problem, whenever i am trying to read/write data. i am able to read and write 16 bit of mux data, i am unable to get full 32bit data. If i change to normal mode means then i am getting upper 16bit data. What changes have to made to get the entire 32bit data. Hi,
I am using i.mx51 board. I am trying to get the 32bit mux data CS0. (MUM=1,DSZ=011)

I am facing a problem, whenever i am trying to read/write data. i am able to read and write 16 bit of mux data, i am unable to get full 32bit data. If i change to normal mode means then i am getting upper 16bit data.

What changes have to made to get the entire 32bit data.

]]> By: ejacklin https://billauer.se/blog/2011/10/imx51-imx-weim-freescale-arm-bus/comment-page-1/#comment-1070 ejacklin Thu, 19 Mar 2015 09:56:21 +0000 https://billauer.se/blog/?p=1989#comment-1070 Hi, I am using i.Mx6 EIM-interface to communicate with ALtera FPGA, I configured it to work in asynchronous multiplexed mode, but CS0 is always running high, i am not able to toggle it, can you please let me how can i toggle the CS0. Hi,
I am using i.Mx6 EIM-interface to communicate with ALtera FPGA, I configured it to work in asynchronous multiplexed mode, but CS0 is always running high, i am not able to toggle it, can you please let me how can i toggle the CS0.

]]> By: Zhenxin Zhang https://billauer.se/blog/2011/10/imx51-imx-weim-freescale-arm-bus/comment-page-1/#comment-787 Zhenxin Zhang Tue, 03 Jul 2012 03:05:05 +0000 https://billauer.se/blog/?p=1989#comment-787 Hi, I am using IMX53 EIM-interface to communicate with a uart-chip. I configure it to work in asynchronous mode: 8-bit data residing on DA[23-16], and CS0 CS1 RW OE signals are configured. The problem is CS RW OE keep high when I read or write to the address space. I have configured the EIM-reg and IOMUX_GPR1-reg. Is there anything I missed? Thank you. Hi, I am using IMX53 EIM-interface to communicate with a uart-chip.
I configure it to work in asynchronous mode: 8-bit data residing on DA[23-16], and CS0 CS1 RW OE signals are configured.
The problem is CS RW OE keep high when I read or write to the address space.
I have configured the EIM-reg and IOMUX_GPR1-reg. Is there anything I missed?
Thank you.

]]> By: Soya https://billauer.se/blog/2011/10/imx51-imx-weim-freescale-arm-bus/comment-page-1/#comment-688 Soya Wed, 28 Dec 2011 02:58:37 +0000 https://billauer.se/blog/?p=1989#comment-688 Hi. I am using imx51 processor in linux. When accessing WEIM with sync mode,32 bit,Chip select1 I am getting both data and address phase for every write but i am not getting data and address phase in read. I set the CS1GCR1, CS1GCR2, CS1RCR1, CS1RCR2, CS1WCR1, CS1WCR2 registers. My read register value is CS1RCR1- 0x0a010000 CS1RCR2 - 0x0 Did I miss any settings for read register.? Hi. I am using imx51 processor in linux. When accessing WEIM with sync mode,32 bit,Chip select1 I am getting both data and address phase for every write but i am not getting data and address phase in read.
I set the CS1GCR1, CS1GCR2, CS1RCR1, CS1RCR2, CS1WCR1, CS1WCR2 registers.

My read register value is CS1RCR1- 0x0a010000
CS1RCR2 – 0x0
Did I miss any settings for read register.?

]]> By: eli https://billauer.se/blog/2011/10/imx51-imx-weim-freescale-arm-bus/comment-page-1/#comment-648 eli Thu, 10 Nov 2011 22:58:18 +0000 https://billauer.se/blog/?p=1989#comment-648 I rely on Linux' initialization of the system, so I haven't gone down to the details about how the clocks are set up. Sorry. I rely on Linux’ initialization of the system, so I haven’t gone down to the details about how the clocks are set up. Sorry.

]]> By: kadamaje https://billauer.se/blog/2011/10/imx51-imx-weim-freescale-arm-bus/comment-page-1/#comment-647 kadamaje Thu, 10 Nov 2011 22:54:32 +0000 https://billauer.se/blog/?p=1989#comment-647 I'm trying to access an FPGA device from an i.MX51 processor too, but can't get it to work. I also tried using the same register settings as you mention. A difference I noticed was that in the waveforms you show (next page), if I turn off the BCM bit in WEIM Config Register, my BCLK turns off completely- even when the chip select goes low- no BCLK. Any suggestions you could give would be helpful. Also, would it be possible to provide the boot program source code that you are using, perhaps I'm not initializing some clocks right? I’m trying to access an FPGA device from an i.MX51 processor too, but can’t get it to work. I also tried using the same register settings as you mention. A difference I noticed was that in the waveforms you show (next page), if I turn off the BCM bit in WEIM Config Register, my BCLK turns off completely- even when the chip select goes low- no BCLK.
Any suggestions you could give would be helpful. Also, would it be possible to provide the boot program source code that you are using, perhaps I’m not initializing some clocks right?

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