I implemented MMCM with the ability of dynamic reconfiguration to the settings which are not known in advance. When I know the required multiplier and dividers, I pass those numbers to the functions provided from Xilinx reference design and then program the MMCM. It works, but I get several critical warnings, because timing requirements are not met.

I thought I should rewrite those functions into modules to obtain the register values in more cycles. But that would be a lot of work.

Another option is to set a multicycle path constraint for these paths and take into account that in the design.

Is there any other option?

Thanks