Comments on: Using Linux’ setpci to program an EEPROM attached to an PLX / Avago PCIe switch https://billauer.se/blog/2015/10/linux-plx-avago-pcie-switch-eeprom/ Anything I found worthy to write down. Thu, 26 Mar 2026 13:15:15 +0000 hourly 1 http://wordpress.org/?v=3.1.2 By: Johnny https://billauer.se/blog/2015/10/linux-plx-avago-pcie-switch-eeprom/comment-page-1/#comment-1672 Johnny Tue, 25 Apr 2023 17:15:01 +0000 https://billauer.se/blog/?p=4821#comment-1672 Hi I would like to know if you can point me on how to set different link speed on those pcie switch like PEX8748 / 8749 ? Like all the standard are set a 8port running at 4x. But what about having port group at 8x (2*8x) and 4*4x ? How can we set the port 11-10 16-17 .. in a speed 8x and rest being at 4x ... Thanks appreciated Hi I would like to know if you can point me on how to set different link speed on those pcie switch like PEX8748 / 8749 ? Like all the standard are set a 8port running at 4x. But what about having port group at 8x (2*8x) and 4*4x ? How can we set the port 11-10 16-17 .. in a speed 8x and rest being at 4x …
Thanks appreciated

]]> By: htsh https://billauer.se/blog/2015/10/linux-plx-avago-pcie-switch-eeprom/comment-page-1/#comment-1397 htsh Thu, 10 Jan 2019 03:47:12 +0000 https://billauer.se/blog/?p=4821#comment-1397 Can you use mmio read/write instead of setpci. If yes, is 260, 264 just the offset from the BAR of the device? Can you use mmio read/write instead of setpci.
If yes, is 260, 264 just the offset from the BAR of the device?

]]> By: Sam Abu-Nassar https://billauer.se/blog/2015/10/linux-plx-avago-pcie-switch-eeprom/comment-page-1/#comment-1279 Sam Abu-Nassar Fri, 14 Jul 2017 02:17:17 +0000 https://billauer.se/blog/?p=4821#comment-1279 Just correcting a few things here: - The EEPROM controller registers (260h/264h) are PLX-specific registers & typically not exported to PCI config space, which means setpci won't work. This is controlled by a bit in another register. If I remember correctly, the 8600 series (Sirius family) has this enabled by default, but that is not the case on other switches. - PLXMon GUI doesn't support I2C, but the command-line tool (PlxCm) & the PDE GUI do. All these tools are able to access the EEPROM in-band over PCIe. - The EEPROM byte address width (1,2, or 3) is auto-detected if 5Ah is in byte 0 of the EEPROM, otherwise the EEPROM controller defaults to 1B. With later switches (8600+), the byte addressing may be overridden by software, but the user should know what to use for their EEPROM. 2B is the most popular. Recommend to refer to the PLX SDK FAQ document provided in the freely downloadable PLX PCI SDK, which has a complete section on EEPROM issues. Just correcting a few things here:

- The EEPROM controller registers (260h/264h) are PLX-specific registers & typically not exported to PCI config space, which means setpci won’t work. This is controlled by a bit in another register. If I remember correctly, the 8600 series (Sirius family) has this enabled by default, but that is not the case on other switches.

- PLXMon GUI doesn’t support I2C, but the command-line tool (PlxCm) & the PDE GUI do. All these tools are able to access the EEPROM in-band over PCIe.

- The EEPROM byte address width (1,2, or 3) is auto-detected if 5Ah is in byte 0 of the EEPROM, otherwise the EEPROM controller defaults to 1B. With later switches (8600+), the byte addressing may be overridden by software, but the user should know what to use for their EEPROM. 2B is the most popular.

Recommend to refer to the PLX SDK FAQ document provided in the freely downloadable PLX PCI SDK, which has a complete section on EEPROM issues.

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