Comments on: Setting up Si5324/Si5328 on Xilinx development boards https://billauer.se/blog/2020/08/silicon-labs-si532x-xilinx/ Anything I found worthy to write down. Thu, 26 Mar 2026 13:15:15 +0000 hourly 1 http://wordpress.org/?v=3.1.2 By: Epiphany https://billauer.se/blog/2020/08/silicon-labs-si532x-xilinx/comment-page-1/#comment-1727 Epiphany Wed, 20 Sep 2023 02:32:31 +0000 https://billauer.se/blog/?p=6126#comment-1727 Hi Eli, I've just started looking into VCU118 and as said above this blog is very useful because we will need Si5328 to eliminate jitter. Thank you so much for Posting! A problem I have encountered is that I do not know much about IIC communication, and my knowledge of controlling the Si5328 chip is also limited. Now I am planning to write the register map table generated by DSPLLsim software into FPGA to realize the communication between FPGA and the anti-shake chip, that is, the configuration process of si5328. However, there are difficulties in the program writing stage. Could you please give me some Pointers on program writing? Thank you for any tips that can help me get up and running quickly. Thanks in advance, Hi Eli,
I’ve just started looking into VCU118 and as said above this blog is very useful because we will need Si5328 to eliminate jitter. Thank you so much for Posting! A problem I have encountered is that I do not know much about IIC communication, and my knowledge of controlling the Si5328 chip is also limited. Now I am planning to write the register map table generated by DSPLLsim software into FPGA to realize the communication between FPGA and the anti-shake chip, that is, the configuration process of si5328. However, there are difficulties in the program writing stage. Could you please give me some Pointers on program writing?

Thank you for any tips that can help me get up and running quickly.

Thanks in advance,

]]> By: eli https://billauer.se/blog/2020/08/silicon-labs-si532x-xilinx/comment-page-1/#comment-1529 eli Mon, 04 Jan 2021 16:36:04 +0000 https://billauer.se/blog/?p=6126#comment-1529 Hello, That's actually a question to Xilinx. As for myself, I wrote that logic from scratch. Hello,

That’s actually a question to Xilinx. As for myself, I wrote that logic from scratch.

]]> By: Bob Servilio https://billauer.se/blog/2020/08/silicon-labs-si532x-xilinx/comment-page-1/#comment-1528 Bob Servilio Mon, 04 Jan 2021 16:13:03 +0000 https://billauer.se/blog/?p=6126#comment-1528 Hi Eli, I'm just starting to look into the KCU116 and this blog is very useful since we will be needing the jitter atten provided by the 5328. Thanks so much for publishing it! One question I had was: Once one uses the DSPLLsim tool to generate the reg settings, does Xilinx provide a way to read that file and configure the silabs part on the KCU116 board? Some sort of UI backdoor mode? Or are there existing software drivers for this part? Thanks for any pointers you can provide that could help me get up and running quickly. Thanks in advance, Bob Hi Eli,

I’m just starting to look into the KCU116 and this blog is very useful since we will be needing the jitter atten provided by the 5328. Thanks so much for publishing it!

One question I had was: Once one uses the DSPLLsim tool to generate the reg settings, does Xilinx provide a way to read that file and configure the silabs part on the KCU116 board? Some sort of UI backdoor mode? Or are there existing software drivers for this part?

Thanks for any pointers you can provide that could help me get up and running quickly.

Thanks in advance,
Bob

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