Comments on: Ultrascale GTH transceivers: Advanced doesn’t necessarily mean better https://billauer.se/blog/2020/09/xilinx-gth-gtx-gtp-eye-scan/ Anything I found worthy to write down. Thu, 26 Mar 2026 13:15:15 +0000 hourly 1 http://wordpress.org/?v=3.1.2 By: Daniels Kurgs https://billauer.se/blog/2020/09/xilinx-gth-gtx-gtp-eye-scan/comment-page-1/#comment-1535 Daniels Kurgs Wed, 24 Feb 2021 16:36:24 +0000 https://billauer.se/blog/?p=6136#comment-1535 We're just now also in the situation, where the LPM equalizer shows better performance than the DFE on Ultrascale's GTH. Eli, or maybe Evgeni, do you perhaps have any idea if we could override 10 out of the 11 DFE taps to 0? The idea is to try DisplayPort's reference DFE, which has just one tap. Of course, Xilinx offers no support in modifying the DFE in their official documentation. We’re just now also in the situation, where the LPM equalizer shows better performance than the DFE on Ultrascale’s GTH.

Eli, or maybe Evgeni, do you perhaps have any idea if we could override 10 out of the 11 DFE taps to 0? The idea is to try DisplayPort’s reference DFE, which has just one tap.

Of course, Xilinx offers no support in modifying the DFE in their official documentation.

]]> By: Evgeni Stavinov https://billauer.se/blog/2020/09/xilinx-gth-gtx-gtp-eye-scan/comment-page-1/#comment-1521 Evgeni Stavinov Thu, 10 Sep 2020 04:54:25 +0000 https://billauer.se/blog/?p=6136#comment-1521 I've been spending significant amount of time dealing with Xilinx Ultrascale transceivers, and squeezing every bit of performance out of them. Specifically, for supporting latest USB 4, PCIe Gen5, and 200/400 GbE specs. Whatever settings transceiver IP wizard provides are not going to achieve the best possible performance, that's for sure. You'd need to work with your FAE to get a few settings for RXDFE_GC_CFG2 and other undocumented registers that might work better for your specific channel and SSC clock. I even found experimentally that completely turning off automatic DFE adaptation and running custom algorithm (reading DFE and gain stats from Digital Monitor interface) did improve performance. I’ve been spending significant amount of time dealing with Xilinx Ultrascale transceivers, and squeezing every bit of performance out of them. Specifically, for supporting latest USB 4, PCIe Gen5, and 200/400 GbE specs. Whatever settings transceiver IP wizard provides are not going to achieve the best possible performance, that’s for sure. You’d need to work with your FAE to get a few settings for RXDFE_GC_CFG2 and other undocumented registers that might work better for your specific channel and SSC clock. I even found experimentally that completely turning off automatic DFE adaptation and running custom algorithm (reading DFE and gain stats from Digital Monitor interface) did improve performance.

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